CMP - United Business Media TechOnline
All Articles Products Courses Papers VirtuaLabs Webinars Web
 
LoginRegister
      TechOnline > Learning >  Technical Paper
Technical Papers
Adding Hardware Accelerators to Reduce Power in Embedded Systems

Click to Download
pdf logo
White Paper
725 KB (5 pages)
September 2009
 

Rodney Frazer
Altera

Not all functions are equally suited to trading circuits for frequency. Functions that operate in parallel run much faster when hardware is available to execute several steps simultaneously, which translates into greater performance for a given clock speed, but also into lower clock speed for a given performance level. Thus, the addition of hardware to a chip design can lower power demands while maintaining performance.

 
Rate this paper
WORSE | BETTER
1 2 3 4 5

submit a paper
Follow Tech Papers

Altera
   

TECH PAPER
1. Advanced Verification of Low Power Designs

TECH PAPER
2. Sensorless BLDC Motor Control Based on CY8C24x33

TECH PAPER
3. To Retain or Not to Retain: How Do I Verify the State Elements of My Low Power Design?

TECH PAPER
4. OS Strategies for the Next Generation of Green Devices