Overview:
The speed of DDR (Double Data Rate) memory technology has increased tremendously in the last few years. The latest DDR3 technology is operating at 1.6GT/s and at the same time, the signal voltage has decreased to reduce power consumption. The faster and smaller signals are now more susceptible to error and data corruption which post new challenges for reliable system operation.
It is necessary to be able to verify, debug and root cause the issues before the product ships out. This presentation will outline the common DDR physical and protocol layer issues as well as recommending some methods to help you identify and solve the problems. Besides that, it will describe new probing solutions and tools to simplify DDR measurements.
Duration: One hour
Who should view this Webcast?
Design Engineer, Test Engineer, Product Engineer, Reliability Engineer, Project Manager
Giveaway:
Registrants who complete the feedback form by September 5 will be entered in a drawing to win one of two $75 Amazon.com gift certificates. Official Rules
Presenters:
Min-Jie Chong, Product Manager, Design Validation Division, Agilent Technologies
Min-Jie Chong is a product manager of the Agilent memory test solution for the oscilloscope business segment. Infiniium 8000 Series oscilloscope business. In addition, he manages the Infiniium 8000 Series oscilloscope business. Min-Jie has completed 5 years of working for Agilent in areas spanning product manufacturing and sales support consultant for oscilloscope before his current position.
Alexander Dickson, Technical Marketing Engineer, Agilent Technologies
Alex Dickson is a Technical Marketing Engineer in Agilent's Logic Analyzer division. Alex has a broad background in digital test, including six years of experience as an Application Engineer supporting Agilent's Oscilloscopes and Logic Analyzers.
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