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| Portable Impulse Response Models for Signal Integrity Applications |
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This webcast is based on a paper first presented at DesignCon 2008 Conference. It was one of only ten papers from among the eighty-eight presented at DesignCon that were honored with the IEC DesignCon Paper Award.
Overview:
In the signal integrity industry, S-parameters have become the most commonly distributed models for simulating passive components. Because S-parameters are frequency-domain values, many signal integrity engineers are finding it difficult to accurately implement these parameters in time-domain simulations. Addressing transient convolution specifically, this paper shows the need for a new impulse response model and proposes a methodology for its inclusion in time-domain simulations. The paper also solves another difficult problem by presenting a new technique for converting band-limited S-parameters into 'base-delay' causal and passive impulse response models that preserve accuracy to the maximum frequency of the original S-parameters.
Duration: One hour
Who should view this Webcast:
This webcast will benefit high-speed serial link designers and signal integrity engineers who use S-parameter and impulse response interconnect models.
Giveaway:
Registrants who completely fill out the feedback form by May 15th 2009 will be eligible to win one of two $75 Amazon.com gift certificates. Official Rules
Presenter:
Sanjeev Gupta, Signal Integrity Applications Expert, Agilent Technologies
Authors:
Fangyi Rao, Senior Development Engineer, Agilent Technologies
Fangyi Rao received his Ph.D. degree in physics from Northwestern University in 1997, for research in quantum theory of magnetism and transport. He joined Agilent EEsof in 2006 as a Senior Development Engineer, where he works on Analog/RF simulation technology in ADS and RFDE. From 2003 to 2006 he was with Cadence Design Systems, where he made key contributions to the company's Flexible Balance technology and perturbation analysis of nonlinear circuits. Prior to 2003 he worked in the areas of EM simulation, nonlinear device modeling, and optimization.
Chad Morgan, Member of Technical Staff, Tyco Electronics
Chad Morgan earned his degree in Electrical Engineering from the Pennsylvania State University, University Park, in 1995. For the past 12 years, he has worked in the Circuits & Design group of Tyco Electronics as a signal integrity engineer, specializing in the analysis & design of high-speed, high-density components. Currently, he is a Member of Technical Staff with Tyco Electronics, where he focuses on high-frequency measurement & characterization of components & materials, full-wave electromagnetic modeling of high-speed interconnects, and the simulation of digital systems. Mr. Morgan's responsibilities at Tyco Electronics include numerous research activities, and he has presented multiple papers at both DesignCon & IMS.
Sanjeev Gupta, Signal Integrity Applications Expert, Agilent Technologies
Sanjeev Gupta, the Signal Integrity Applications Expert in the EEsof EDA Division of Agilent Technologies, has over eighteen years of experience in high frequency design and simulation. Before joining Hewlett Packard, he worked as a high frequency design engineer/scientist at the Defense Research and Development Organization in India. His background includes the design and development of 100 MHz to 100 GHz active and passive circuits for a wide variety of applications. His most recent activity is focused on influencing the Signal Integrity Design Flow in ADS. He received a Master's Degree in Microwave Engineering from the University of Delhi, India in 1988. Sanjeev was awarded the Hewlett Packard President's Award in 1998 for his contributions to the company.
Vuk Borich, Operating Manager for Analog/RF Simulation Models, Agilent Technologies
Vuk Borich is the Operating Manager for Analog/RF Simulation and Models at Agilent EEsof. He earned a Ph.D. degree in Electrical Engineering from the University of Michigan, Ann Arbor, in 2000. He joined Agilent EEsof in 2005, contributing to harmonic balance simulation of frequency dividers. From 2003 to 2005 he was with Cadence Design Systems, where he worked on the Ultrasim FastSpice simulator as a Senior Member of Technical Staff. From 2000 to 2003 he was with Applied Wave Research, first as Senior Development Engineer and then as Manager of Simulation Technology, where he made several key contributions to the company's harmonic balance technology, oscillator analysis, and phase noise simulation.
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