CMP - United Business Media TechOnline
All Articles Products Courses Papers VirtuaLabs Webinars Web
 
LoginRegister
      TechOnline > Electronics Company Directory > Technical Paper
Technical Papers
Development and Optimization Techniques for Multi-core Processors

Click to Download
pdf logo
2007 Embedded Systems Conference
71 KB (14 pages)
April 05, 2007
 

Max Domeika
Intel

Microprocessor design is experiencing a shift away from a predominant focus on pure performance to a balanced approach that optimizes for power as well as performance. Multi-core processors continue this trend and are capable of sharing work and executing tasks on independent execution cores concurrently. In many cases, taking full advantage of the performance benefits of these processors will require developers to thread their applications. This goal of this paper is to provide an understanding of multi-core architecture, focusing on various shared-memory threading techniques, such as OpenMP. Some common challenges involved in threading, such as data races & cache conflicts, are also discussed. Finally, tools support and practical techniques available to assist with stability and performance are covered.

 
Rate this paper
WORSE | BETTER
1 2 3 4 5

submit a paper
Follow Tech Papers

Embedded Systems Conference (ESC)
Intel
   

WEBINAR
1. Embedded Solutions using open-standards base MicroTCA architecture

TECH PAPER
2. Development and Optimization Techniques for Multi-core Processors

WEBINAR
3. Multi-Core Made Simple

TECH PAPER
4. The Multi-Core Transition: A Giant Leap Forward in Embedded and Communications Design