Diagnosing CDC Errors in FPGAs
Technical Paper
Mentor Graphics Technical Library This white paper discusses the nature of CDC errors and presents a powerful solution that aids in their detection and removal.
RTL and Synthesis Design Approach to Radiation-Harden and Fail-Safe Targeted Applications
Technical Paper
Mentor Graphics Technical Library This paper discusses how to automate RTL code design checking and how to synthesize the checked RTL code to produce correct by construction, fail-safe digital design techniques that implement a fault-tolerant design.
BGA Breakouts and Routing
Technical Paper
Mentor Graphics Technical Library This book presents a number of studies and solutions for addressing these challenges. Very large BGAs, over 1500 pins, present a unique challenge for routing on a printed circuit board. Often just routing out of the BGA is the primary contributor to the number of layers required for routing.
SRAF Enhancement using Inverse Lithography for 32 nm Hole Patterning and Beyond
Technical Paper
Mentor Graphics Technical Library In this paper we propose to make a comparison of the two approaches on random 2D features. We will see that Inverse Lithography permits to keep a sufficient DOF on 2D features configurations where Rule based appears to be limited.
