Motor Control Design — Unlocking the mysteries to optimize efficiency in your application
System designers look for ways to optimize motor efficiency, address energy consumption and minimize cost in their designs. However, there is a certain amount of mystery involved with how to accomplish this task. Choosing the optimal topology for driving motors in your application is key to optimizing efficiency. In addition, addressing thermals and knowing when to use ‘brute force’ in controlling motor drive and when and how to take a more gentle, targeted approach will help improve your design and extend the life of your application. This panel webinar will examine some considerations you will face in your application design and ways to address each potential challenge.
- The role of Analog energy-efficiency on the road to All Digital Products
- Defining Efficiency across the Voltage/Current/Power Range and how to improve the flatness of the curve
- Definition of the motor efficacy and work around to improve EMI/EMC compatibility
- Using feedback systems and FOC algorithms to manage load angle and optimize motor efficiency
Art Gonsky, Solutions Development Manager, ON Semiconductor
Art Gonsky is a Solutions Development Manager for the global marketing team at ON Semiconductor. Mr. Gonsky has over 30 years experience in the power electronics industry. Prior to his current position at ON Semiconductor he worked as a principal Field Applications Engineer supporting the entire ON Semiconductor portfolio. Mr. Gonsky holds an MSEE and a BSEE from the Ukraine Politech Institute & Air Force Academy.
Steve Sheard is a senior applications and marketing engineer at ON Semiconductor, supporting the SSG Motor Drive product portfolio. Mr. Sheard has over 35 years in the electronics industry. Previously he worked at Motorola as an applications and marketing engineer supporting products from image sensors and virtual displays to GPS receivers and navigation systems. Mr. Sheard holds an MBA from the University of Phoenix and a BSEE from the City & Guilds of London.
Steve Taranovich, Senior Technical Editor, Analog & Power Design Centers, EDN Editor, Integration Nation on Planet Analog
Steve Taranovich is a senior technical editor at EDN with 41 years of experience in the electronics industry. Steve received his MSEE from Polytechnic University, Brooklyn, New York, and his BEEE from New York University, Bronx, New York. He is also chairman of the Educational Activities Committee for IEEE Long Island. His expertise is in analog, RF and power management with a diverse embedded processing education as it relates to analog design from his years at Burr-Brown and Texas Instruments. Steve was a circuit design engineer for his first 16 years in electronics. He then served as one of the first field application engineers with Burr-Brown Corp and also became one of their first global account managers, traveling to Europe, India and China.