datasheets.com EBN.com EDN.com EETimes.com Embedded.com PlanetAnalog.com TechOnline.com  
Events
UBM Tech
UBM Tech
Welcome Guest Log In | Register | Benefits

How to Accelerate OpenCV Applications with Zynq-7000 All Programmable SoC using Vivado HLS Video Libraries

Original Air Date: Aug 28, 2013 | Duration: 60 min. Webinar
7 2
More Info Less Info

Overview:
In this presentation, you will learn how to rapidly accelerate real-time computer vision algorithms and integrate them into your designs using Xilinx Zynq®7000 All Programmable SoC devices. Step-by-step examples will show you how to build and integrate custom video accelerators by migrating functions from the OpenCV library or your own custom video algorithms into your embedded design using guaranteed-to-synthesize HLS (High-level Synthesis) video libraries; the Vivado® HLS compiler; and the Vivado IP Integrator. This design flow allows you to implement real-time embedded computer-vision algorithms using a seamless combination of high-performance, low-power, on-chip programmable hardware for high-data-rate (full HD) pixel-processing tasks and software-programmable ARM processor cores for frame-based processing tasks that operate at lower data rates.

What attendees will learn:

  • Xilinx Smarter Vision solutions' for computer vision
  • How to implement OpenCV functions using Zynq-7000 All Programmable SoCs.
  • How to accelerate OpenCV function calls by replacing them with HLS-synthesizable function calls that run as much as 700x faster than the same functions implemented in software.
  • How to refactor OpenCV functions by encapsulating them in a hardware accelerator with standard AXI4 interfaces and easily connect these hardware locks to the rest of your system.
  • How to rapidly integrate Vivado HLS created accelerator functions using the Vivado IP Integrator in a reference design based on the Zynq-7000 All Programmable SoC ZC702 Eval Board.
Presenters:
Stephen Neuendorffer, Principal Engineer, Vivado High-Level Synthesis, Xilinx
Stephen Neuendorffer is a Principal Engineer and Product Architect in the High-Level Synthesis group at Xilinx. He has been working at Xilinx for almost nine years focusing on High-Level Synthesis and improving the usability of programmable logic devices for software engineers. Prior to working in the product group he spent seven years in the Xilinx research labs. Stephen received B.S. degrees in electrical engineering and computer science from the University of Maryland, College Park, in 1998. He graduated with University Honors, Departmental Honors in electrical engineering, and was named the Outstanding Graduate in the Department of Computer Science. He received the Ph.D. degree from the University of California, Berkeley, in 2003, after being one of the key architects of Ptolemy II. He has more than 30 publications and 14 patents.

Girish Malipeddi, Video Solutions Marketing Manager, Xilinx
Girish Malipeddi is a Sr. Product Manager for video solutions at Xilinx. Girish has been in the FPGA industry for over 13 years and is responsible for defining programmable logic device based video solutions. Prior to that, he was doing Product Applications and Marketing at Audience and Memory design at Alliance Semiconductor. Girish holds M.S.E.E from the University of Alabama in Huntsville and a B.S.E.E from Osmania University, Hyderabad, India. He has published articles on Programmable logic devices for Video applications.

2 comments
write a comment

No Avatar

dani.h.b.uni Posted Aug 27, 2013

AWESOME!!!! this is exactly what I need. Thanks!! :)

reply

No Avatar

kohimavittal Posted Aug 29, 2013

Excellent presentation. Much needed and highly useful

reply

Please Login

You will be redirected to the login page

×

Please Login

You will be redirected to the login page

×

Please Login

You will be redirected to the login page