Formal functional verification has matured to the point where it is far easier for users to adopt than ever before. Yet, despite the advances, many users have not seen the promised gains in productivity from formal. The most common reason for this is the unstructured way formal has been traditionally applied in the verification
environment.
In this paper, we outline a simple methodology for effectively planning a production verification flow that easily integrates formal verification into an existing simulation environment. We also show how to effectively deploy a tiered application of formal verification within a project based upon end user skill set and comfort level with the technology.
Jasper Design Automation is a privately held electronic design automation (EDA) company delivering a formal functional verification solution capable of detecting all of the design bugs in most complex electronic design blocks.
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