SystemC is a new modeling language based on C++ that is intended to enable system level design and IP exchange. This tutorial paper briefly reviews the hardware modeling features available in SystemC 1.0 and then introduces the new system level modeling features in SystemC 2.0. A small design example is presented that demonstrates how the new features facilitate system level design tasks such as communication refinement and mapping of design specifications to hardware and software implementations. Also discussed is how the new modeling features enable a wide variety of models of computation to be cleanly expressed within SystemC.
For more information on SystemC, visit the Open SystemC Initiative (OSCI)'s Web
site.
Cadence supplies electronic design technologies and engineering services used to manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer... Read More
The Open SystemC Initiative strives to establish a modeling platform and language that enables, promotes, and accelerates system-level co-design and IP exchange. Through... Read More
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