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Chip-Package-System Methodologies for Reliable, Cost-Optimized ICs for Automotive and Embedded Applications

Posted on: Jul 30, 2013 | Duration: 30 min.
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The use of high-performance processors for Automotive and Embedded applications is continuing to rise. Unlike other applications, the ICs used for these markets must care about individual component-level power-performance-cost trade-offs in addition to compatibility with other IC’s and overall integration within a system environment. These types of designs must meet key targets such as Power Budgeting, Power Integrity, Electronic Interference Compatibility, Electric Discharge Immunity and Thermal susceptibility.



This presentation will explain how ANSYS-Apache technologies address Chip-Package-System analysis needs utilizing solutions such as PowerArtist, RedHawk, Totem, PathFinder, Sentinel and SIwave.



Presenter:

Jerome Toublanc is a Principal Product Engineer providing technical support for European customers and driving the direction for ANSYS-Apache's Power and Noise solutions for full System Integrity. Prior experiences focused on different SoC implementation tools such as Place & Route and Power Analysis, and also include analog/digital full-custom circuit design. He received his Engineer Degree in Microelectronics from ESIEE-Paris, France.

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